Following an RV32 dot product through LLVM's machine scheduler, then reading the real llvm-mca output for the instruction order before and after scheduling.

Following a small RISC-V instruction sequence through LLVM's dependency graph, ready queues, and scheduling decisions.

Building LLVM's RISC-V scheduling model from the hardware questions established by instruction pipelining, forwarding, and instruction-level parallelism.

Following values through an in-order RISC-V pipeline to understand forwarding, stalls, scoreboards, and where instruction-level parallelism comes from.

Starting from the hardware problem that makes instruction pipelining necessary, then following a concrete RISC-V instruction sequence to the first limit on overlap.

A personal note on the beautiful connection between digits, polynomials, convolution, and FFT-based multiplication.

My beginner-friendly notes on what MoE routing does with a complete prompt and why some experts naturally receive more tokens than others.

My beginner-friendly notes on why Mixture of Experts exists, what an expert is, and how a model chooses which experts to use.

Lessons about model execution, memory placement, layer offloading, synchronization, and performance from porting llama2.c to an OpenCL device.

Building a cache from first principles to understand why cache lines, sets, ways, eviction, and way locking exist.