2026

• 17 Aug Part 5 : Evaluating LLVM Instruction Scheduling for Rocket RV32
• 17 Aug Part 4 : How LLVM Schedules RISC-V Machine Instructions
• 17 Aug Part 3 : How LLVM Models RISC-V Processor Latency and Resources
• 17 Aug Part 2 : Pipeline Dependencies, Forwarding, and Instruction-Level Parallelism
• 17 Aug Part 1 : Instruction Pipelining in an In-Order RISC-V Processor
• 13 Aug How FFT Made Me See Multiplication Differently
• 13 Aug MoE Routing During Prefill: Why Experts Receive Unequal Work
• 13 Aug From a Regular Language Model to Mixture of Experts
• 12 Aug What Porting llama2.c to an OpenCL Device Taught Me About LLM Inference
• 12 Aug Cache Fundamentals: From Cache Lines to Way Locking